(2023) Iterative Circuit Repair Against Formal Specifications.
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Abstract
We present a deep learning approach for repairing sequential circuits against formal specifications given in linear-time temporal logic (LTL). Given a defective circuit and its formal specification, we train Transformer models to output circuits that satisfy the corresponding specification. We propose a separated hierarchical Transformer for multimodal representation learning of the formal specification and the circuit. We introduce a data generation algorithm that enables generalization to more complex specifications and out-of-distribution datasets. In addition, our proposed repair mechanism significantly improves the automated synthesis of circuits from LTL specifications with Transformers. It improves the state-of-the-art by 6.8 percentage points on held-out instances and 11.8 percentage points on an out-of-distribution dataset from the annual reactive synthesis competition.
Item Type: | Conference or Workshop Item (A Paper) (Poster) |
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Divisions: | Bernd Finkbeiner (Reactive Systems Group, RSG) |
Conference: | ICLR International Conference on Learning Representations |
Depositing User: | Frederik Schmitt |
Date Deposited: | 25 Jul 2023 14:06 |
Last Modified: | 25 Jul 2023 14:06 |
Primary Research Area: | NRA2: Reliable Security Guarantees |
URI: | https://publications.cispa.saarland/id/eprint/3992 |
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