(2019) Syntroids: Synthesizing a Game for FPGAs using Temporal Logic Specifications.
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Abstract
We present Syntroids, a case study for the automatic synthesis of hardware from a temporal logic specification. Syntroids is a space shooter acarde game realized on an FPGA, where the control flow architecture has been completely specified in Temporal Stream Logic (TSL) and implemented using reactive synthesis. TSL is a recently introduced temporal logic that separates control and data. This leads to scalable synthesis, because the cost of the synthesis process is independent of the complexity of the handled data. In this case study, we report on our experience with the TSL-based development of the Syntroids game and on the implementation quality obtained with synthesis in comparison to manual programming. We also discuss solved and open challenges with respect to currently available synthesis tools.
| Item Type: | Conference or Workshop Item (A Paper) (Paper) |
|---|---|
| Conference: | FMCAD Formal Methods in Computer-Aided Design |
| Depositing User: | Bernd Finkbeiner |
| Date Deposited: | 25 May 2020 11:27 |
| Last Modified: | 11 May 2021 13:52 |
| Primary Research Area: | NRA2: Reliable Security Guarantees |
| URI: | https://publications.cispa.saarland/id/eprint/3072 |
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